BMEN90033 · Week 10
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BMEN90033 · WEEK 10 · ACTIVE PEAK DETECTORS

Active peak detection.

Overview

The passive peak detector of the preceding chapter is limited by three properties of its components. The diode forward voltage $V_F$ sets a lower bound on the smallest input that can produce an output. The source impedance in series with the diode limits the rate at which the storage capacitor charges to a new peak. Any finite load impedance at the output discharges the capacitor between successive peaks. This chapter shows that enclosing the diode and the storage capacitor within the feedback path of an operational amplifier removes all three limitations. The development proceeds in four stages: the precision half-wave rectifier; the precision peak detector; a comparison of passive and active detectors on a common input; and application to the seizure-detection case study introduced earlier in the week.

op-amp super diode precision rectifier hold capacitor buffer reset
01the precision half-wave rectifier

Eliminating $V_F$ with negative feedback.

The active counterpart of the diode rectifier places the diode inside the feedback path of an operational amplifier. The input drives the non-inverting terminal; the op-amp output drives the anode of the diode; the cathode forms the output node; and feedback returns from the output node to the inverting terminal. The resulting circuit is the precision half-wave rectifier, or super diode.

For a positive input, the op-amp adjusts its output until $V_\mathrm{out} = V_\mathrm{in}$. The op-amp output therefore settles at $V_\mathrm{in} + V_F$, and the diode forward voltage is supplied by the loop rather than subtracted from the signal. Referred to the output, the residual error is $V_F / A_\mathrm{OL}$, where $A_\mathrm{OL}$ is the open-loop gain. For a typical op-amp this error is of order microvolts. For a negative input, the op-amp saturates at its negative supply rail, the diode is reverse biased, and the output is zero.

Figure 1.2 compares the two rectifiers on a common sinusoidal input. The passive output is offset below the input by $V_F$ and remains at zero for any input not exceeding $V_F$. The precision output reproduces the positive half-cycle of the input from zero, independent of amplitude.

The op-amp has finite slew rate and must recover from negative saturation at every zero crossing. Near the crossing, the output departs from the ideal half-wave for a short interval set by the slew rate and the gain-bandwidth product. Connecting a second diode from the output node to the inverting input clamps the op-amp output one diode drop above ground during the blocked half-cycle and reduces the recovery interval.
amplitude 1.40 V VF 0.65 V f 1.2 Hz
figure 1.1 · precision half-wave rectifier
figure 1.2 · output vout(t) of the passive and precision rectifiers for a common input vin(t)
peak vin1.40 V
passive peak0.75 V
precision peak1.40 V
small signalpasses
02the precision peak detector

Three modes of operation: acquire, hold, reset.

The precision peak detector comprises four functional blocks. The super diode of Section 01, formed by $A_1$ and $D_1$, drives a storage capacitor $C$ at its output node. A unity-gain buffer $A_2$ presents the capacitor voltage to the load. An n-channel MOSFET $M_\mathrm{rst}$ in parallel with $C$ provides a controlled discharge path. Outer feedback returns from the buffer output to the inverting input of $A_1$, enclosing the entire signal chain within a single feedback loop.

Operation reduces to three modes, selected by the relative values of the input $V_\mathrm{in}$, the capacitor voltage $V_C$, and the reset gate signal $\phi_\mathrm{rst}$.

Acquire: $V_\mathrm{in} > V_C$, $\phi_\mathrm{rst} = 0$

When the input exceeds the held voltage, $A_1$ drives $D_1$ into conduction and the capacitor charges. The outer feedback loop forces $V_C$ to track $V_\mathrm{in}$; both the diode forward voltage $V_F$ and the buffer offset are divided by the open-loop gain rather than subtracted from the signal. The acquisition rate is set by the maximum source current of $A_1$ and by $C$: $\mathrm{d}V_C / \mathrm{d}t \approx I_\mathrm{src} / C$.

Hold: $V_\mathrm{in} < V_C$, $\phi_\mathrm{rst} = 0$

When the input falls below the held voltage, the output of $A_1$ saturates at its negative supply rail and $D_1$ becomes reverse biased. The capacitor is isolated from the source. The buffer $A_2$ presents $V_C$ to the load through a high input impedance, so negligible discharge current flows and $V_C$ remains constant over the measurement window.

Reset: $\phi_\mathrm{rst} = 1$

When the gate signal is asserted, $M_\mathrm{rst}$ enters the triode region and discharges the capacitor through its on-resistance $R_\mathrm{on}$. A short reset pulse applied before each acquisition window returns $V_C$ to zero, so the value reported during the window is the maximum of $V_\mathrm{in}$ within that window alone.

The storage capacitor $C$ is the central design parameter. A smaller value shortens the acquisition time but increases the rate at which $V_C$ droops between peaks, owing to leakage through the reverse-biased diode and the buffer input. A FET-input op-amp with bias current of order tens of picoamperes holds a $1\,\mathrm{nF}$ storage capacitor flat to within $1\,\mathrm{mV}$ over a hundred milliseconds.
amplitude 0.30 V VF 0.60 V window 300 ms fcarrier 14 Hz
figure 2.1 · precision peak detector with reset
figure 2.2 · held output vout(t) of the passive and precision detectors for a common input vin(t)
figure 2.3 · reset waveform φrst(t)
peak vin0.30 V
passive output0.00 V
precision output0.30 V
window300 ms
03comparison on a representative input

Three detectors on a common waveform.

The test waveform combines three features common in biopotential measurement: a slow baseline drift; a sequence of small spikes with amplitude comparable to the diode forward voltage; and a subsequent sequence of larger spikes whose envelope rises and then decays. The same waveform is processed by the diode-capacitor detector, the RC envelope detector, and the precision peak detector with periodic reset. The three outputs are overlaid for direct comparison.

Diode-capacitor detector

This circuit transfers charge to the storage capacitor only when the input exceeds $V_F$, so the small-spike interval is not registered. After the first large spike, the capacitor holds the all-time maximum and the output cannot follow the subsequent decay.

RC envelope detector

This circuit retains the diode threshold $V_F$ and adds a trade-off between ripple and envelope lag. With $\tau$ short enough to follow the falling envelope, the output ripples at the carrier frequency. With $\tau$ long enough to suppress the ripple, the output lags the envelope. Spikes below $V_F$ remain undetected.

Precision peak detector

The active detector reports, for each reset window, the largest value attained by $V_\mathrm{in}$ within that window. Because the diode is enclosed in the feedback loop, the small early spikes are captured. Because the storage capacitor is buffered from the load, the held value does not droop during a window.

The reset window is the only design parameter that must be matched to the input. It must be short enough that successive peaks of interest fall in different windows, and long enough that the acquisition time of one peak is small relative to the window. Within these bounds, the detector output is independent of the carrier frequency, the envelope frequency, and the diode forward voltage.
small spike 0.35 V VF 0.55 V τ (RC) 400 ms window 600 ms
figure 3.1 · test input vin(t) comprising small spikes followed by a decaying spike train
figure 3.2 · output of the diode-capacitor, RC envelope, and precision peak detectors
small spikes seen0 / 4
passive simplelatched
passive RClags
precision activetracking
04application to the seizure case study

Resolving the amplitude branch.

The case study introduced earlier in Week 10 specified a circuit chain that must detect, measure, and track a recurring spike in the low-pass filtered electroencephalogram of a seizure-clinic patient. The clinically relevant feature is the rising envelope of the spikes in the seconds preceding a seizure, because this envelope is the predictive signature reported by clinicians.

The amplitude branch proposed in the case study consisted of a passive peak detector, $D + C \parallel R_\mathrm{leak}$. Three failure modes of this circuit are pertinent to the recorded signal:

  • Spikes below $V_F$ are not detected. Filtered EEG spikes have amplitudes in the millivolt range, whereas a silicon diode requires $V_F \approx 0.6\,\mathrm{V}$ before conduction begins. The earliest pre-state spikes, which carry the greatest predictive value, are exactly those the passive circuit discards.
  • The held value droops between events. The leak resistor needed to release the previous hold also discharges the capacitor during the inter-spike interval. The amplitude reported is the peak minus a time-dependent offset rather than the peak itself.
  • A large peak masks subsequent smaller peaks. Until the leak time constant returns the held value to a sufficiently low level, no smaller spike can produce a measurable output. The shape of the rising envelope, the clinical feature of interest, is therefore lost.

The precision peak detector developed in the preceding sections substitutes for the passive block one-for-one and removes all three failure modes. The diode sits within the op-amp feedback loop, so a millivolt-scale early spike charges the storage capacitor without the $V_F$ floor. The unity-gain buffer behind the storage capacitor isolates it from the downstream load, so the held value remains constant within a measurement window. The reset MOSFET across the storage capacitor clears the stored charge between windows, so each new spike is acquired from zero rather than masked by its predecessor.

The output reported to the clinician is therefore a step staircase: each window holds the maximum of $V_\mathrm{in}$ within it, and the sequence of held values reproduces the rising amplitude envelope specified in the brief. Spike counting is performed in parallel by the Schmitt-trigger and monostable branch; the precision detector replaces only the amplitude branch.

The storage capacitor is the single component that converts the precision rectifier of Section 01 into a peak detector. Its placement, on the output of the super diode and inside the feedback path of the buffer, allows a millivolt-scale EEG spike to register at the converter without the diode forward drop, and allows the held reading to remain valid until the next reset pulse arrives.
// open the case study Detecting pre-seizure spikes in clinical EEG Slides 04 and 05 of the case study specify the passive peak block. Substituting the precision peak detector developed here for that block satisfies the brief.
VF 0.60 V τleak 900 ms window 900 ms
figure 4.1 · pre-state input vin(t) with rising-amplitude spikes
figure 4.2 · held output of the passive detector (D + C ∥ Rleak) and of the precision detector (storage capacitor, buffer, reset)
spikes presented8
passive captured0 / 8
precision captured8 / 8
envelope on screenvisible
1 / 5